specifications of any and all sanyo semiconductor co.,l td. products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer ' s products or equipment. to verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer ' sproductsor equipment. any and all sanyo semiconductor co.,ltd. products described or contained herein are, with regard to "standard application", intended for the use as general el ectronics equipment (home appliances, av equipment, communication device, office equipment, industrial equ ipment etc.). the products mentioned herein shall not be intended for use for any "special application" (medica l equipment whose purpose is to sustain life, aerospace instrument, nuclear control device, burning appliances, t ransportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level of re liability and can directly threaten human lives in case of failure or malfunction of the product or may cause har m to human bodies, nor shall they grant any guarantee thereof. if you should intend to use our products for app lications outside the standard applications of our customer who is considering such use and/or outside the scope of our intended standard applications, please consult with us prior to the intended use. if there is n o consultation or inquiry before the intended use, our customer shall be solely responsible for the use. 21809 ms 20090209-s00003 / 52404tn (ot) no.7817-1/8 LA6565 overview the LA6565 is a 4-channel btl plus 1-channel h-bridge actuator driver developed for use in cd and dvd drives. the btl driver channels 1 and 2 include bu ilt-in operational amplifiers allowing the LA6565 to support a wide range of applications. functions ? five power amplifier channels on a single chip (bri dge connection (btl): 4-channels, h-bridge: 1-channel) ? i o max: 1a ? built-in level shifters (except for the h bridge channel) ? muting circuits (output on/off, two systems) (the muting circuits operate for the btl amplifiers. they do not apply to the h-bridge or regulator circuits.) ? built-in regulator (uses an external pnp-transi stor and is set with an external resistor.) ? output voltage setting function (loading driver) ? built-in independent operational amplifiers ? thermal shutdown circuit specifications maximum ratings at ta = 25 c parameter symbol conditions ratings unit maximum supply voltage v cc max 14 v maximum output current i o max 1a maximum input voltage v inb 13 v mute pin voltage v mute 13 v independent ic 0.8 w allowable power dissipation pd max mounted on a specified board * 2 w operating temperature topr -40 to +85 c storage temperature tstg -55 to +150 c * specified board: 114.3mm 76.1mm 1.6mm, glass epoxy board. monolithic linear ic for cd and dvd players 5-channel driver (btl:4ch,h-bridge:1ch) orderin g numbe r : en7817a
LA6565 no.7817-2/8 recommended operating conditions at ta = 25 c parameter symbol conditions ratings unit supply voltage v cc 5.6 to 13 v electrical characteristics at ta = 25 c, v cc 1 = v cc 2 = 8v, vref = 2.5v ratings parameter symbol conditions min typ max unit overall quiescent current when o i cc -on btl amplifier output on, loading block off *1 30 50 ma quiescent current when off i cc -off all outputs off *1 10 15 ma thermal shutdown circuit operating temperature tsd *7 150 175 200 c vref amplifier vref amplifier offset volt age vref-offset -10 +10 mv vref input voltage range vref-in 1 v cc -1.5 v vref-out output current i-vref-out 1 ma operational amplifier (independent) input voltage range v in (op) 0 v cc -1.5 v output current (sink) sink(op) 2 ma output current (source) source(op) 300 500 a output offset voltage v off (op) -10 +10 mv residual current (sink) v ce -sink(op) i o (sink side) = 1ma 0.6 v btl amplifier block (channels 1 to 4) output offset voltage v off the voltage difference between each channel outputs *2, *3 -50 +50 mv input voltage range v in input voltage range of the i nput operational amplifiers 0 v cc -1.5 v output voltage v o i o = 0.5a, the voltage between v o + and v o - in each channel 5.7 6.2 v closed circuit voltage gain vg the gain from the input to the output with the input amplifier set to 0db*2, *3 7.2 8 9 times slew rate sr sr for the independent amplifier. times 2 when between outputs.*7 0.5 v/ s muting on voltage v mute -on the output on voltage, for ea ch mute function *4 2.5 v muting off voltage v mute -off the output off voltage, for ea ch mute function *4 0.5 v input amplifier block (channels 1 and 2) input voltage range v in -op 0 v cc -1.5 v output current (sink) sink-op 2 ma output current (source) source-op *5 300 500 a output offset voltage v off -op -10 +10 mv loading block (channel 5, h bridge circuit) output voltage v o -load for forward/reverse operation, i o = 0.5a, vcont = v cc * 5.7 6.5 v braking output saturation voltage v ce -break the output voltage during braking *6 0.3 v low-level input voltage v in -l 1 v high-level input voltage v in- h 2 v power supply block (uses an external 2sb632k pnp-transistor) power supply output v out i o = 200ma 1.260 1.285 1.310 v reg-in sink current reg-in-sink external pnp-transistor base current 5 10 ma line regulation ? v o ln 6v v cc 12v, i o = 200ma 10 100 mv load regulation ? v o ld 5ma i o 200ma 10 100 mv *1: the total current dissipation for v cc p1, v cc p2, and v cc s with no load. *2: the input amplifier is a buffer amplifier. *3: the voltage difference between the two sides of the load (12 ? ). *4: when the mute pin is high, the output will be on, and when low, the output will be off (high-impedance state). *5: the input operational amplifier source is constant current. since the 11k ? resistor between this and the next st age functions as the load, the input operational amplifier gain must be set carefully. *6: the braking operation is a short (to ground) braking operation. the sink side output is on at this time. *7: design guarantee.
LA6565 no.7817-3/8 package dimensions unit : mm (typ) 3251 pin assignment 1 fwd 2 v o 3 + 3 v o 3 ? 4 5 6 7 8 36 35 34 33 32 31 30 29 mute1 mute234 v o 4 + v o 4 ? 9 fr 10 11 12 v in 3 ? 13 14 15 16 17 v in 4 ? 18 reg_in v in 4 v in 3 28 27 26 25 24 23 22 21 20 19 vref_out v in 2 + v in 2 ? v in 2 v cc s v in 1 + v in 1 ? s_gnd v o 2 + v o 2 ? v o 1 + v o 1 ? top view fr rev v cc 2 v lo + v lo ? v cc p1 v in 1 reg_out vref_in v o _op vcont v in + op v in ? op sanyo : hsop36r(375mil) (6.2) 36 1 19 18 0.8 2.0 17.8 0.3 (4.9) 2.7 0.65 0.25 (0.5) 7.9 10.5 (2.25) 2.45max 0.1 -20 0 20 40 60 80 100 0 2.5 2.0 1.5 1.0 0.5 pd max -- ta 0.8 -40 1.04 0.42 ambient temperature, ta -- c allowable power dissipation, pd max -- w independent ic with specified board specified board: 114.3 76.1 1.6mm 3 glass epoxy boaard.
LA6565 no.7817-4/8 block diagram 1 fwd 2 v o 3 + 3 v o 3 ? 4 5 6 7 8 36 35 34 33 32 31 30 29 s_gnd mute234 mute1 v o 4 + v o 4 ? 9 10 11 12 v in 3 ? 13 14 15 16 17 reg_out v in 4 ? 18 reg-in v in 3 28 27 26 25 24 23 22 21 20 19 v in 2 + v in 2 ? v in 2 v o 2 + v o 2 ? v o 1 + v o 1 ? v cc ch1 fr fr 44k ? 11k ? v lo + v lo ? fwd v ccp 2 v cc p1 v in 1 + v in 1 ? v in 1 v in 1 44k ? 11k ? v in 4 vref_out vref_in 44k ? 11k ? v o _op v in + op v in ? op to vref_out ch2,3,4 mute turms the corresponding channel on/off high: output on low: output off 44k ? 11k ? to vref_out (v cc ) reg_in reg_out vcont input thermal shutdown circuit signal system ground (load output voltage setting) output control level shift level shift level shift level shift power system ground power system ground signal system power supply
LA6565 no.7817-5/8 pin function pin no. pin name pin function 1 fwd loading output direction switching (fwd). loading system logic input. 2 rev loading output direction switching (rev). loading system logic input. 3 v cc 2 channels 3, 4, and loading power stage power supply. 4 v lo ? loading output ( ? ) 5 v lo + loading output (+) 6 v o 4 + channel 4 output (+) 7 v o 4 ? channel 4 output ( ? ) 8 v o 3 + channel 3 output (+) 9 v o 3 ? channel 3 output ( ? ) 10 v o 2 + channel 2 output (+) 11 v o 2 ? channel 2 output ( ? ) 12 v o 1 ? channel 1 output ( ? ) 13 v o 1 + channel 1 output (+) 14 v cc p1 channels 1 and 2 power stage power supply. 15 v cc s signal system power supply. 16 v in 1 + channel 1 input. input operational amplifier + input. 17 v in 1 ? channel 1 input. input operational amplifier ? input. 18 v in 1 channel 1 input. input operational amplifier output. 19 v in 2 + channel 2 input. input operational amplifier + input. 20 v in 2 ? channel 2 input. input operational amplifier ? input. 21 v in 2 channel 2 input. input operational amplifier output. 22 v in 3 ? channel 3 input. input operational amplifier ? input. 23 v in 3 channel 3 input. input operational amplifier output. 24 v o _op operational amplifier output. 25 v in ? op operational amplifier ? input 26 v in + op operational amplifier + input 27 reg_in regulator error amplifier output. connect this pin to the base of the external pnp-transistor. 28 reg_out regulator error amplifier input (+). 29 vref_out vref amplifier (voltage follower) output. 30 vref_in vref input. a pply the external reference voltage to this pin. 31 v in 4 channel 4 input. input operational amplifier output. 32 v in 4 ? channel 4 input. input operational amplifier ? input. 33 mute234 controls the on/off state of channels 2, 3, and 4. 34 mute1 channel 1 output on/off control 35 vcont loading block output high-level voltage setting. 36 s_gnd signal system ground. * center frame (fr) becomes gnd for the power system, set this to the minimum potential together with s_gnd (signal system grou nd).
LA6565 no.7817-6/8 pin description pin no. pin name function description equivalent circuit 16 17 18 19 20 21 22 23 32 31 26 25 24 v in 1 + v in 1 ? v in 1 v in 2 + v in 2 ? v in 2 v in 3 ? v in 3 v in 4 ? v in 4 v in + op v in ? op v o _op input (ch1 to 4) inputs (channels 1 to 4 and the independent operational amplifier) v in* ? v cc s s-gnd v in* v in* + 300 ? 300 ? 300 ? 1 2 fwd rev input (h-bridge) logic inputs. the ic is set to one of four modes, forward, reverse, brake, and free running by the combination of high and low values applied to these pins. s-gnd 50k ? 50k ? fwd 50k ? 50k ? rev 12 13 10 11 8 9 6 7 v o 1 + v o 1 ? v o 2 + v o 2 ? v o 3 + v o 3 ? v o 4 + v o 4 ? output (btl-amp) channel 1 to 4 outputs. v cc p fr v o* 1k ? 1k ? 4 5 v lo ? v lo + output (h-bridge) h-bridge (loading) output. 35 vcont input loading output setting. v cc p2 v lo + v lo ? s_gnd 1k ? 1k ? 20k ? 20k ? vcont 33 34 mute234 mute1 mute btl amplifier output on/off state setting. high: output on low: output off v cc s s-gnd mute * 10k ? 20k ? 40k ?
LA6565 no.7817-7/8 truth table (loading (h bridge) block) fwd rev v lo + v lo ? loading output l off off off *1 l h h l forward l l h reverse h h l l short-circuit braking *2 *1. the output goes to t he high-impedance state. *2. in braking mode, the sink side transistor is turned on (for short-circuit braking). the v lo + and v lo ? pins go to a level that is essentially the ground level. relationship between the mute pins and the power supply systems (v cc p*) ch1 (btl) ch2 (btl) ch3 (btl) ch4 (btl) mute1 mute2 ch5 (h-bridge) v cc p1 v cc p2 application circuit example 1 2 v o 3 + 3 v o 3 ? 4 5 6 7 8 36 35 34 33 32 31 30 29 s_gnd mute1 mute234 v o 4 + v o 4 ? 9 fr 10 v cc p1 11 12 v in 3 ? 13 14 15 16 17 vin4 ? 18 vref_in v in 4 v in 3 28 27 26 25 24 23 22 21 20 19 v in 2 + v in 2 ? v in 2 v in 1 v in 1 + v in 1 ? v o 2 + v o 2 ? v o 1 + v o 1 ? m fr 0.1 f 2.2 ? tracking coil focus coil sled motor loading moter lb6565 tracking loading mute234 mute1 v lo + v lo ? v cc p2 v cc spindle motor focus sled spindle vref v cc reg_in reg_out fwd rev 0.1 f 2.2 ? 0.1 f 2.2 ? m 0.1 f 2.2 ? m 0.1 f 2.2 ? v cc s v o _op vcont vref_out v in + op v in ? op reg
LA6565 ps no.7817-8/8 sanyo semiconductor co.,ltd. assumes no responsib ility for equipment failures that result from using products at values that exceed, even momentarily, rate d values (such as maximum ra tings, operating condition ranges, or other parameters) listed in products specif ications of any and all sanyo semiconductor co.,ltd. products described or contained herein. sanyo semiconductor co.,ltd. strives to supply high-qual ity high-reliability products, however, any and all semiconductor products fail or malfunction with some probabi lity. it is possible that these probabilistic failures or malfunction could give rise to acci dents or events that could endanger human lives, trouble that could give rise to smoke or fire, or accidents that could cause dam age to other property. when designing equipment, adopt safety measures so that these kinds of accidents or e vents cannot occur. such measures include but are not limited to protective circuits and error prevention c ircuits for safe design, redundant design, and structural design. upon using the technical information or products descri bed herein, neither warranty nor license shall be granted with regard to intellectual property rights or any other rights of sanyo semiconductor co.,ltd. or any third party. sanyo semiconductor co.,ltd. shall not be liable f or any claim or suits with regard to a third party's intellctual property rights which has resulted from the use of the technical information and products mentioned above. information (including circuit diagr ams and circuit parameters) herein is for example only; it is not guaranteed for volume production. any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. when designing equi pment, refer to the "delivery specification" for the sanyo semiconductor co.,ltd. product that you intend to use. in the event that any or all sanyo semiconductor c o.,ltd. products described or contained herein are controlled under any of applicable local export control laws and regulations, such products may require the export license from the authorities conc erned in accordance with the above law. no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any in formation storage or retrieval system, or otherwise, without the prior written consent of sanyo semiconductor co.,ltd. this catalog provides information as of february, 2 009. specifications and information herein are subject to change without notice.
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